Publications

Found 16 results
Filters: Author is Francisco J. Cazorla  [Clear All Filters]
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J. Abella, Hernandez, C., Quinones, E., Cazorla, F. J., Conmy, P. Ryan, Azkarate-askasua, M., Perez, J., Mezzetti, E., and Vardanega, T., “WCET Analysis Methods: Pitfalls and Challenges on their Trustworthiness”, SIES 2015, 2015.
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C. Hernandez, Abella, J., Cazorla, F. J., Andersson, J., and Gianarro, A., “Towards Making a LEON3 Multicore Compatible with Probabilistic Timing Analysis”, DASIA 2015, 2015.
L. Kosmidis, Vargas, R., Morales, D., Quinones, E., Abella, J., and Cazorla, F. J., “TASA: Toolchain-Agnostic Software Randomisation for Safety-Critical Real-Time Systems”, ICCAD 2016, 2016.
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I. Agirre, Azkarate-askasua, M., Larrucea, A., Perez, J., Vardanega, T., and Cazorla, F. J., “A safety concept for a railway mixed-criticality embedded system based on multicore partitioning”, DASC 2015, 2015.
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D. Trilla, Hernandez, C., Abella, J., and Cazorla, F. J., “Resilient Random Modulo Cache Memories for Probabilistically-Analyzable Real-Time Systems”, IOLTS 2016, 2016.
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M. Slijepcevic, Fernandez, M., Hernandez, C., Abella, J., Quinones, E., and Cazorla, F. J., “pTNoC: Time-Analyzable Scalable NoC Designs for Mixed-Criticality Multicore Embedded Systems”, DSD 2016, 2016.
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S. Milutinovic, Abella, J., and Cazorla, F. J., “Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns”, ISORC 2016, 2016.
P. Benedicte, Kosmidis, L., Quinones, E., Abella, J., and Cazorla, F. J., “Modeling the Confidence of Timing Analysis for Software Time Randomised Caches”, INDIN 2016, 2016.
P. Benedicte, Kosmidis, L., Quinones, E., Abella, J., and Cazorla, F. J., “Modeling the Con dence of Timing Analysis for Time Randomised Caches”, SIES 2016, 2016.
P. Ryan Conmy, Pearce, M., Ziccardi, M., Mezzetti, E., Vardanega, T., Anderson, J., Gianarro, A., Hernandez, C., and Cazorla, F. J., “Measurement-Based Probabilistic Timing Analysis: From Academia to Space Industry”, DASIA 2015, 2015.
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I. Agirre, Azkarate-askasua, M., Perez, J., Hernandez, C., Abella, J., Vardanega, T., and Cazorla, F. J., “IEC-61508 SIL3-compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis”, DSD 2015, 2015.
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L. Kosmidis, Quinones, E., Abella, J., Vardanega, T., Hernandez, C., Gianarro, A., Broster, I., and Cazorla, F. J., “Fitting Processor Architectures for Measurement-Based Probabilistic Timing Analysis”, 2016.
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M. Ziccardi, Mezzetti, E., Vardanega, T., Abella, J., and Cazorla, F. J., “EPC: Extended Path Coverage for Measurement-based Probabilistic Timing Analysis”, RTSS 2015, 2015.
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G. Fernandez, Abella, J., Quinones, E., Rochange, C., Vardanega, T., and Cazorla, F. J., “Contention in multicore hardware shared resources: Understanding of the state of the art”. WCET 2014 workshop, 2014.
A
I. Agirre, Azkarate-askasua, M., Larrucea, A., Perez, J., Vardanega, T., and Cazorla, F. J., “Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore”. SASSUR 2016, 2016.
M. Panic, Abella, J., Quinones, E., Hernandez, C., Ungerer, T., and Cazorla, F. J., “Analyzing TDMA and Round-Robin with MBPTA”, DSD 2015, 2015.